Simulation labs
18
live circuits on three tracks: digital, analog, and quantum. Start at the left of a track; every lab to its right builds on the one it is wired to. Each is compiled from @schemd/core source and runs a real numerical model you tune on the parts themselves. Describe one of your own
- Digital track
- Analog track
- Quantum track
- Completed here
- Recommended next
- 01, Digital 8-Bit Digital Adder
8-Bit Digital Adder
Cascading ripple-carry gate matrix with a live combinational pass.
Lab 1 objective: Trace a carry dependency through a combinational gate network.
No prerequisite
Coreevent-driven Boolean solver - 02, Analog Dynamic RC Low-Pass Filter
Dynamic RC Low-Pass Filter
Sweep R, C, and frequency; watch the pole attenuate the output trace.
Lab 2 objective: Predict how component values move a first-order pole and attenuation.
No prerequisite
Corefrequency-domain transfer function - 03, Quantum Bell-State Entanglement Visualizer
Bell-State Entanglement Visualizer
Prepare the four Bell states; sample the ⟨Z⊗Z⟩ correlation.
Lab 3 objective: Distinguish an entangled Bell state from a classical mixture using outcomes and CHSH.
No prerequisite
Advancedstate-vector + Born sampler - 04, Mixed-signal 555 Astable Multivibrator
555 Astable Multivibrator
A real charge/discharge loop clocking an output LED.
Lab 4 objective: Relate RC charge thresholds to oscillator frequency and duty cycle.
Builds on Dynamic RC Low-Pass Filter
Corehybrid charge/discharge integrator - 05, Advanced quantum Quantum Teleportation Protocol
Quantum Teleportation Protocol
Step a three-qubit register through the full teleportation script.
Lab 5 objective: Explain why entanglement and two classical bits are both necessary for teleportation.
Builds on Bell-State Entanglement Visualizer
Advancedstepped three-qubit protocol - 06, Power electronics Closed-Loop Buck Converter
Closed-Loop Buck Converter
Drive a PWM power stage across CCM, boundary, and discontinuous conduction.
Lab 6 objective: Predict averaged buck-converter output and recognize conduction-mode boundaries.
Builds on Dynamic RC Low-Pass Filter
Frontiercontinuous-time averaged state space - 07, UML statechart Live State Machine
Live State Machine
Fire events and watch a token walk the transitions of a running UML machine.
Lab 7 objective: Predict guarded state transitions and identify a liveness failure.
Builds on 8-Bit Digital Adder
Advancedevent-driven finite-state executor - 08, Quantum Quantum Error Correction
Quantum Error Correction
Protect a qubit you are forbidden to read by measuring only disagreement.
Lab 8 objective: Infer a single-qubit bit flip from syndrome parity without reading the logical state.
Builds on Bell-State Entanglement Visualizer
Frontierstabilizer parity + syndrome decoder - 09, Active analog Wien-Bridge Oscillator
Wien-Bridge Oscillator
An amplifier with just enough positive feedback sings a pure tone out of noise.
Lab 9 objective: Use loop gain and phase to predict oscillator startup or decay.
Builds on Dynamic RC Low-Pass Filter
Advancedsecond-order loop with amplitude limiting - 10, Sequential digital Maximal-Length LFSR
Maximal-Length LFSR
Four flip-flops and one XOR make a stream that looks random but repeats after exactly 15.
Lab 10 objective: Connect primitive feedback taps to the period of an LFSR sequence.
Builds on 8-Bit Digital Adder
Advancedclocked shift register over GF(2) - 11, Quantum Grover 3-Qubit Search
Grover 3-Qubit Search
Rotate the whole haystack toward the needle — √N queries, not N.
Lab 12 objective: Explain Grover search as amplitude rotation and identify over-rotation.
Builds on Phase Kickback
Frontieramplitude amplification over 8 states - 12, Signal integrity Transmission-Line Reflections
Transmission-Line Reflections
Launch a step down a cable and watch the far end answer back.
Lab 13 objective: Read a reflection coefficient from a near-end echo and terminate a line.
Builds on Dynamic RC Low-Pass Filter
Advancedlattice (bounce) diagram of a lossless line - 13, Active analog Phase-Locked Loop
Phase-Locked Loop
An oscillator that listens: it tunes itself until its phase stops slipping.
Lab 15 objective: Explain lock as a steady phase error and find the hold range of a PLL.
Builds on Wien-Bridge Oscillator
Advancednonlinear phase-error dynamics - 14, Power electronics Class-D Amplifier You Can Hear
Class-D Amplifier You Can Hear
Chop audio into a square wave, then filter the music back out — and listen to both.
Lab 17 objective: Place an LC cutoff between the audio band and the PWM carrier.
Builds on Closed-Loop Buck Converter
Advancednatural-sampling PWM + 2nd-order LC filter - 15, Control systems PID Motor Speed Control
PID Motor Speed Control
Tune three gains until the motor arrives fast, without overshoot, and stays there.
Lab 16 objective: Tune P, I, and D for a fast, offset-free step response without windup.
Builds on Closed-Loop Buck Converter
Advanceddiscrete PID + first-order DC motor with saturation - 16, Mixed-signal Sigma-Delta Converter
Sigma-Delta Converter
One bit, sampled fast, can carry sixteen — if you push the noise somewhere else.
Lab 18 objective: Relate modulator order and oversampling to noise shaping and ENOB.
Builds on 555 Astable Multivibrator
Frontier1st/2nd-order ΔΣ modulator + FFT - 17, Sequential digital UART Logic Analyzer
UART Logic Analyzer
No shared clock: the receiver times every bit from one falling edge.
Lab 14 objective: Explain asynchronous framing and the clock tolerance of mid-bit sampling.
Builds on Maximal-Length LFSR
Coreasynchronous framing + mid-bit sampling - 18, Quantum Phase Kickback
Phase Kickback
The gate acts on the target, yet the control is the one that changes.
Lab 11 objective: Show that an eigenstate target moves a controlled phase onto the control.
Builds on Bell-State Entanglement Visualizer
Advancedtwo-qubit state vector + reduced Bloch vector