Sigma-Delta Converter

Mixed-signal

A sine passes through one or two integrators, a one-bit quantizer, and a one-bit DAC in feedback. A $4096$ -sample FFT of the bitstream shows the quantization noise shaped by $(1-z^{-1})^L$ out of the signal band, and the in-band SNR and ENOB follow the order $L$ and oversampling ratio.

Live circuit first-order, OSR 32, 6.0 effective bits

Drag a value tag to change that part. Click a wire to clip a probe on.

Causal signal trace paused

Subtract the last bit The summing node takes the input minus the one-bit DAC output: the error of everything sent so far.

t_{\mathrm{stage}}=\htmlData{math-slot=value}{\mathtt{0.00}}\,\mathrm{s}

Step 1 / 5 Subtract the last bit

Notebook: 10 parts and 11 wires, modelled as 1st/2nd-order ΔΣ modulator + FFT

Recommended lab 18 of 18

Relate modulator order and oversampling to noise shaping and ENOB.

Builds on: 555 Astable Multivibrator

Predict, then test

A one-bit modulator’s quantization error is as large as the signal. Where does a sigma-delta loop put most of that error?

Commit before the explanation appears. This is a prediction, not a quiz score.

Governing model

Y(z) = X(z) + (1 - z^{-1})^L E(z) \;\cdot\; \mathrm{ENOB} = \dfrac{\mathrm{SNR} - 1.76}{6.02}

Parts

input sine $x$
summing node + integrator
$1$ -bit quantizer, clocked at $f_s$
feedback DAC + decimator

Limits of the model

amplitude $0.05$ – $0.7$
$\mathrm{OSR}: 8$ – $128$
order $L\in\{1,2\}$

Diagnosis challenge The fault is hidden. Work it out from the changed outputs first.