schemd
schemd · simulation laboratory v0.8.0 · 18 environments

Simulation labs

18 live circuits on three tracks: digital, analog, and quantum. Start at the left of a track; every lab to its right builds on the one it is wired to. Each is compiled from @schemd/core source and runs a real numerical model you tune on the parts themselves. Describe one of your own →

Curriculum map
  • Digital track
  • Analog track
  • Quantum track
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0 of 18 experiments completed on this device

  • 01 · Digital

    8-Bit Digital Adder

    Cascading ripple-carry gate matrix with a live combinational pass.

    Lab 1 · objective Trace a carry dependency through a combinational gate network.

    No prerequisite

    Core event-driven Boolean solver
    Si=Ai⊕Bi⊕Ci  ⋅  Ci+1=AiBi+Ci(Ai⊕Bi)S_i = A_i \oplus B_i \oplus C_i \;\cdot\; C_{i+1} = A_iB_i + C_i(A_i \oplus B_i)
    • 8× full-adder cell
    • 16× XOR + 16× AND
    • 8× OR carry merge
    • A/B/Cᵢₙ + Sum ports

    8-bit operands · 0–255 · sum 0–511 with carry-out · per-gate propagation delay

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 02 · Analog

    Dynamic RC Low-Pass Filter

    Sweep R, C, and frequency; watch the pole attenuate the output trace.

    Lab 2 · objective Predict how component values move a first-order pole and attenuation.

    No prerequisite

    Core frequency-domain transfer function
    fc=12πRC  ⋅  ∣H(jω)∣=11+(f/fc)2f_c = \dfrac{1}{2\pi RC} \;\cdot\; |H(j\omega)| = \dfrac{1}{\sqrt{1 + (f/f_c)^2}}
    • input source node
    • series resistor R
    • shunt capacitor C
    • reference ground

    R 100 Ω – 1 MΩ · C 1 nF – 10 µF · sweep 10 Hz – 100 kHz

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 03 · Quantum

    Bell-State Entanglement Visualizer

    Prepare the four Bell states; sample the ⟨Z⊗Z⟩ correlation.

    Lab 3 · objective Distinguish an entangled Bell state from a classical mixture using outcomes and CHSH.

    No prerequisite

    Advanced state-vector + Born sampler
    ∣Φ+⟩=∣00⟩+∣11⟩2  ⋅  ⟨Z⊗Z⟩∈[−1,+1]|\Phi^+\rangle = \dfrac{|00\rangle + |11\rangle}{\sqrt{2}} \;\cdot\; \langle Z \otimes Z \rangle \in [-1, +1]
    • 2× qubit register line
    • Hadamard gate
    • CNOT control/target
    • measurement ports

    4 Bell states · amplitudes ±1/√2 · CHSH witness S ∈ [0, 2√2]

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 04 · Mixed-signal

    555 Astable Multivibrator

    A real charge/discharge loop clocking an output LED.

    Lab 4 · objective Relate RC charge thresholds to oscillator frequency and duty cycle.

    Builds on Dynamic RC Low-Pass Filter

    Core hybrid charge/discharge integrator
    f=1.44(RA+2RB) C  ⋅  D=RA+RBRA+2RBf = \dfrac{1.44}{(R_A + 2R_B)\,C} \;\cdot\; D = \dfrac{R_A + R_B}{R_A + 2R_B}
    • 8-pin 555 IC block
    • R_A + R_B timing pair
    • timing capacitor C_T
    • output LED + limiter

    V_cc = 5 V · threshold ⅔ · trigger ⅓ · astable + monostable modes

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 05 · Advanced quantum

    Quantum Teleportation Protocol

    Step a three-qubit register through the full teleportation script.

    Lab 5 · objective Explain why entanglement and two classical bits are both necessary for teleportation.

    Builds on Bell-State Entanglement Visualizer

    Advanced stepped three-qubit protocol
    ∣ψ⟩=α∣0⟩+β∣1⟩  ⋅  α=cos⁡θ2, β=eiϕsin⁡θ2|\psi\rangle = \alpha|0\rangle + \beta|1\rangle \;\cdot\; \alpha = \cos\tfrac{\theta}{2},\ \beta = e^{i\phi}\sin\tfrac{\theta}{2}
    • 3× qubit trace (ψ, A, B)
    • H + CNOT preparation
    • Bell-basis measurement
    • X/Z correction gates

    Bloch θ ∈ [0, π], φ ∈ [0, 2π] · 6-step protocol · fidelity F = |⟨ψ|ψ_out⟩|²

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 06 · Power electronics

    Closed-Loop Buck Converter

    Drive a PWM power stage across CCM, boundary, and discontinuous conduction.

    Lab 6 · objective Predict averaged buck-converter output and recognize conduction-mode boundaries.

    Builds on Dynamic RC Low-Pass Filter

    Frontier continuous-time averaged state space
    i˙L=DVin−voL,v˙o=iL−vo/RC\dot i_L = \dfrac{D V_{in}-v_o}{L},\quad \dot v_o = \dfrac{i_L-v_o/R}{C}
    • PWM feedback controller
    • PMOS high-side switch
    • Schottky freewheel diode
    • L–C output network

    V_in 5–36 V · f_sw 20–500 kHz · CCM / BCM / DCM classification

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 07 · UML statechart

    Live State Machine

    Fire events and watch a token walk the transitions of a running UML machine.

    Lab 7 · objective Predict guarded state transitions and identify a liveness failure.

    Builds on 8-Bit Digital Adder

    Advanced event-driven finite-state executor
    δ:S×Σ→S  ⋅  (s,e)↦snext if guard(e)\delta : S \times \Sigma \rightarrow S \;\cdot\; (s, e) \mapsto s_{\text{next}} \text{ if guard}(e)
    • initial pseudostate
    • Red / Green / Yellow states
    • 4 guarded transitions
    • event queue + trace log

    deterministic δ · one active state · guarded, timed transitions

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 08 · Quantum

    Quantum Error Correction

    Protect a qubit you are forbidden to read by measuring only disagreement.

    Lab 8 · objective Infer a single-qubit bit flip from syndrome parity without reading the logical state.

    Builds on Bell-State Entanglement Visualizer

    Frontier stabilizer parity + syndrome decoder
    ∣0⟩L=∣000⟩, ∣1⟩L=∣111⟩  ⋅  s=(q0⊕q1, q1⊕q2)|0\rangle_L = |000\rangle,\ |1\rangle_L = |111\rangle \;\cdot\; s = (q_0{\oplus}q_1,\ q_1{\oplus}q_2)
    • logical qubit → 3 physical
    • injectable X error
    • 2 ancilla syndrome bits
    • majority-vote decoder

    corrects any single bit-flip · syndrome ∈ {00,01,10,11} · logical fidelity 0/1

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 09 · Active analog

    Wien-Bridge Oscillator

    An amplifier with just enough positive feedback sings a pure tone out of noise.

    Lab 9 · objective Use loop gain and phase to predict oscillator startup or decay.

    Builds on Dynamic RC Low-Pass Filter

    Advanced second-order loop with amplitude limiting
    f0=12πRC  ⋅  Aβ=1 (Barkhausen), gain =3f_0 = \dfrac{1}{2\pi RC} \;\cdot\; A\beta = 1 \text{ (Barkhausen), gain } = 3
    • op-amp gain stage
    • series + shunt RC bridge
    • R_f / R_g gain setting
    • amplitude-limiting element

    gain 2.8 – 3.2 · f₀ from RC · Hopf onset at gain = 3

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 10 · Sequential digital

    Maximal-Length LFSR

    Four flip-flops and one XOR make a stream that looks random but repeats after exactly 15.

    Lab 10 · objective Connect primitive feedback taps to the period of an LFSR sequence.

    Builds on 8-Bit Digital Adder

    Advanced clocked shift register over GF(2)
    x4+x3+1  ⋅  period=2n−1=15x^4 + x^3 + 1 \;\cdot\; \text{period} = 2^n - 1 = 15
    • shared clock
    • 4× D flip-flop chain
    • XOR feedback taps 3,4
    • serial m-sequence output

    period 2⁴ − 1 = 15 · all-zero state forbidden · primitive polynomial taps

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 11 · Quantum

    Grover 3-Qubit Search

    Rotate the whole haystack toward the needle — √N queries, not N.

    Lab 12 · objective Explain Grover search as amplitude rotation and identify over-rotation.

    Builds on Phase Kickback

    Frontier amplitude amplification over 8 states
    ∣s⟩→(D Uf)k∣s⟩,k≈π4N  ⋅  N=8|s\rangle \to (D\,U_f)^k|s\rangle,\quad k \approx \dfrac{\pi}{4}\sqrt{N} \;\cdot\; N = 8
    • 3-qubit uniform superposition
    • oracle U_f (phase flip)
    • diffusion 2|s⟩⟨s| − I
    • 8-state amplitude readout

    N = 8 search space · optimal k = 2 rounds · peak P(target) ≈ 0.945

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 12 · Signal integrity

    Transmission-Line Reflections

    Launch a step down a cable and watch the far end answer back.

    Lab 13 · objective Read a reflection coefficient from a near-end echo and terminate a line.

    Builds on Dynamic RC Low-Pass Filter

    Advanced lattice (bounce) diagram of a lossless line
    Γ=Z−Z0Z+Z0  ⋅  V1=Vs Z0Rs+Z0\Gamma = \dfrac{Z - Z_0}{Z + Z_0} \;\cdot\; V_1 = V_s\,\dfrac{Z_0}{R_s + Z_0}
    • step source + R_s
    • 3-section L–C ladder (Z₀, t_d)
    • load Z_L
    • near/far probes

    Z_L 5 Ω – 5 kΩ · Z₀ 25 – 150 Ω · time 0 – 10 t_d

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 13 · Active analog

    Phase-Locked Loop

    An oscillator that listens: it tunes itself until its phase stops slipping.

    Lab 15 · objective Explain lock as a steady phase error and find the hold range of a PLL.

    Builds on Wien-Bridge Oscillator

    Advanced nonlinear phase-error dynamics
    θ˙e=ωref−(ω0+Kvvc)  ⋅  τ v˙c=Kdsin⁡θe−vc\dot\theta_e = \omega_{ref} - (\omega_0 + K_v v_c) \;\cdot\; \tau\,\dot v_c = K_d \sin\theta_e - v_c
    • reference oscillator
    • XOR phase detector
    • RC loop filter
    • VCO with feedback

    f_ref, f₀ 8 – 12 kHz · hold range ±K_vK_d = ±1.2 kHz · τ = RC 0.05 – 2 ms

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 14 · Power electronics

    Class-D Amplifier You Can Hear

    Chop audio into a square wave, then filter the music back out — and listen to both.

    Lab 17 · objective Place an LC cutoff between the audio band and the PWM carrier.

    Builds on Closed-Loop Buck Converter

    Advanced natural-sampling PWM + 2nd-order LC filter
    ∣H(f)∣=1(1−r2)2+2r2,  r=ffc  ⋅  fc=12πLC|H(f)| = \dfrac{1}{\sqrt{(1 - r^2)^2 + 2r^2}},\; r = \dfrac{f}{f_c} \;\cdot\; f_c = \dfrac{1}{2\pi\sqrt{LC}}
    • audio + triangle carrier
    • PWM comparator
    • half-bridge switch
    • LC filter + speaker

    audio 100 Hz – 2 kHz · carrier 4 – 20 kHz (slowed into earshot) · f_c 0.5 – 50 kHz

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 15 · Control systems

    PID Motor Speed Control

    Tune three gains until the motor arrives fast, without overshoot, and stays there.

    Lab 16 · objective Tune P, I, and D for a fast, offset-free step response without windup.

    Builds on Closed-Loop Buck Converter

    Advanced discrete PID + first-order DC motor with saturation
    u=Kpe+Ki ⁣∫e dt+Kd dedt  ⋅  Jω˙=Ku−b ω−τLu = K_p e + K_i\!\int e\,dt + K_d\,\dfrac{de}{dt} \;\cdot\; J\dot\omega = K u - b\,\omega - \tau_L
    • setpoint ω_set
    • parallel K_p, K_i/s, K_d·s paths
    • saturating driver
    • motor + tachometer

    K_p 0 – 10 · K_i 0 – 20 · K_d 0 – 0.5 · driver limit ±12 V

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 16 · Mixed-signal

    Sigma-Delta Converter

    One bit, sampled fast, can carry sixteen — if you push the noise somewhere else.

    Lab 18 · objective Relate modulator order and oversampling to noise shaping and ENOB.

    Builds on 555 Astable Multivibrator

    Frontier 1st/2nd-order ΔΣ modulator + FFT
    Y(z)=X(z)+(1−z−1)LE(z)  ⋅  ENOB=SNR−1.766.02Y(z) = X(z) + (1 - z^{-1})^L E(z) \;\cdot\; \mathrm{ENOB} = \dfrac{\mathrm{SNR} - 1.76}{6.02}
    • input sine
    • summing node + integrator
    • 1-bit quantizer, clocked
    • feedback DAC + decimator

    amplitude 0.05 – 0.7 · OSR 8 – 128 · order 1 or 2

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 17 · Sequential digital

    UART Logic Analyzer

    No shared clock: the receiver times every bit from one falling edge.

    Lab 14 · objective Explain asynchronous framing and the clock tolerance of mid-bit sampling.

    Builds on Maximal-Length LFSR

    Core asynchronous framing + mid-bit sampling
    tk=(k+12)Tbit(1+ε)  ⋅  ∣ε∣≲12Nbitst_k = \left(k + \tfrac12\right) T_{bit}(1 + \varepsilon) \;\cdot\; |\varepsilon| \lesssim \dfrac{1}{2N_{bits}}
    • byte + TX shift register
    • single serial line
    • RX with independent baud clock
    • data + error outputs

    8 data bits, LSB first · parity none/even/odd · clock error ±10 %

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →
  • 18 · Quantum

    Phase Kickback

    The gate acts on the target, yet the control is the one that changes.

    Lab 11 · objective Show that an eigenstate target moves a controlled phase onto the control.

    Builds on Bell-State Entanglement Visualizer

    Advanced two-qubit state vector + reduced Bloch vector
    12(∣0⟩+∣1⟩)∣1⟩→CP(φ)12(∣0⟩+eiφ∣1⟩)∣1⟩  ⋅  P(1)=sin⁡2φ2\tfrac{1}{\sqrt2}(|0\rangle + |1\rangle)|1\rangle \xrightarrow{CP(\varphi)} \tfrac{1}{\sqrt2}(|0\rangle + e^{i\varphi}|1\rangle)|1\rangle \;\cdot\; P(1) = \sin^2\tfrac{\varphi}{2}
    • control + target qubits
    • 2× Hadamard on the control
    • controlled-phase CP(φ)
    • control measurement

    φ ∈ [0, 2π] · targets |0⟩, |1⟩, |+⟩, |−⟩ · purity |r| ∈ [0, 1]

    ○ not completed diagnosis challenge · fault identity withheld Initialize module →