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555 Astable Multivibrator

Mixed-signal

The timing capacitor integrates between $\tfrac{1}{3}V_{cc}$ and $\tfrac{2}{3}V_{cc}$ . The timing-branch stroke weight scales with instantaneous $V_C$ , and the LED node flashes in sync with the calculated frequency (time-scaled for visibility).

8 components · 10 connections · hybrid charge/discharge integrator

the aha
A clock is just a capacitor climbing between two lines, forever losing its patience at the top and giving up at the bottom.

why it works

The 555 watches one voltage: the charge on

C_T

. It charges through

R_A + R_B

until it touches

\tfrac{2}{3}V_{cc}

, then discharges through

R_B

until it sags to

\tfrac{1}{3}V_{cc}

, then repeats — a triangle wave feeding two comparators. Because the RC climb is exponential, not linear, the high and low times are unequal, giving

f = \frac{1.44}{(R_A + 2R_B)\,C}

and a duty always above 50%. Flip to monostable mode and the same climb happens exactly once per trigger: one pulse of width

t = 1.1\,R_A C

— a circuit that holds its breath for a precise, tunable moment.

governing model

f = \dfrac{1.44}{(R_A + 2R_B)\,C} \;\cdot\; D = \dfrac{R_A + R_B}{R_A + 2R_B}

structural inventory

8-pin 555 IC block
$R_A + R_B$ timing pair
timing capacitor $C_T$
output LED + limiter

boundaries

$V_{cc}=5\ \mathrm V$
threshold $\tfrac{2}{3}$ · trigger $\tfrac{1}{3}$
astable + monostable modes

fault relay THRES shorted to ground

Watch $V_C$ ride between the two thresholds.

The timing wire thickens with the instantaneous capacitor voltage. It is not a metaphor — that stroke is $V_C(t)$ sweeping from $\tfrac{1}{3}$ to $\tfrac{2}{3}V_{cc}$ .
Grow $R_B$ and watch the duty cycle skew.

Charging goes through $R_A + R_B$ but discharging only through $R_B$ , so the waveform is never symmetric — the exponential asymmetry made visible.
Switch to monostable and fire a single shot.

One trigger, one clean pulse of width $1.1\,R_A C$ , then silence until the next trigger. The astable clock became a stopwatch.

causal signal trace paused

Bias the timing ladder $V_{C C}$ drives RA and the timing network.

t_{stage} = 0.00 s

step 1 / 4 Bias the timing ladder

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